Samsung Shows New Nodes And Chiplet And 3D Integration Plans

Samsung had an industry Foundry event focused on solutions for “Empowering the AI Revolution,” where they announced new process nodes and technology developments. The company announced technology roadmaps going out to 2027 (see below).

In particular, Samsung announced two new process nodes, SF2Z and SF4U. The 2nm SF2Z, includes a backside power delivery network (BSPDN) to eliminate interference of power with signal lines. In addition to enhancing power, performance and area (PPA) compared to the SF2 (Samsung’s first-generation 2nm node) this also reduces the IR drop (the voltage drop between two ends of a conductor during current flow) and thus enhances high performance computing designs. This new node is planned for mass productions by 2027. The SF4U node offers PPA improvements with mass production planned in 2025.

The company plans SF1.4 (1.4nm) products for mass production in 2027. Samsung says that going below 1.4nm will require material and structural innovations. Samsung has been producing GAA CMOS for three years (since 2022) and will include this on its upcoming 2nm process.

Samsung AI foundry solutions (shown below) include gate all around (GAA) CMOS processes providing low power AI chips but as shown to the right, the company will be introducing co-packaged optics (CPO) in chiplet architectures by 2027 to provide even higher performance.

Samsung says that its Samsung foundry AI sales have increased by 80% over the past year. In addition to leading edge process nodes the company is offering specialty and 8-inch wafer products as well. This range of products lets the company meet customer needs in automotive, medical, wearable and IoT applications. I have heard of several products from Samsung foundry business that include emerging memories such as MRAM for AI inference applications for wearable and other applications.

Samsung introduced its Multi-Die Integration Alliance at its 2023 foundry event. This is a form of chiplet integration, where mostly single purpose chips are combined in a high-performance package, allowing combinations of chiplets, including chiplets from various silicon vendors to be combined into a working system. Samsung says that this will include a focus on 2.5D and 3D IC designs. Note that Samsung joined Intel and many other companies in introducing the UCIe chiplet architecture in 2022. UCIe is based upon the CXL architecture that can be used for memory expansion and pooling.

In addition to its foundry business, Samsung is the market leader in DRAM and NAND flash, introducing some of the industry’s first CXL memory (512GB) in 2022 and introducing the first LPCAMM2 DRAM and the first GDDR7 DRAM earlier in 2023. DRAM, especially in high bandwidth memory (HBM) modules are an important component in AI processing packages (such as those built by NVIDIA). Samsung was showing HBM packages in its announcements.

In addition, Samsung as well as other foundries are offering non-volatile memory options to replace NOR flash at advanced manufacturing nodes (NOR flash doesn’t scale below 28nm) and also to replace some higher-level cache SRAM for storing AI inference models (since MRAM cells are non-volatile and consume less die area).

Products seen to date replace this NOR with MRAM, but ReRAM is also available. The chiplet architectures and 3D heterogeneous integration will also incorporate a wider range of memory and other components for specialized applications.

At Samsung’s Forum event and the following SAFE and MDI Alliance Workshops the company expanded its 2nm and 4nm product lines, announced chiplet integration that include co-packaged optics by 2027 and announced an 80% increase in its AI foundry business over the last year.